/*  *********************************************************************
 *  ASTRIS - Remote JTAG probe
 *
 *  Astris.framework - C++ API
 *
 *  File: NewAPI_CPURgisters.hpp
 *
 ***********************************************************************
 *
 *  Copyright (C) 2021 Apple Inc. All rights reserved.
 *
 *  This document is the property of Apple Inc.
 *  It is considered confidential and proprietary.
 *
 *  This document may not be reproduced or transmitted in any form,
 *  in whole or in part, without the express written permission of
 *  Apple Inc.
 ********************************************************************* */

#ifndef _NewAPI_CPURegisters_hpp_
#define _NewAPI_CPURegisters_hpp_

// Do not edit this file - this file is generated from registers.db.
// Use tools/newapi_generate_cpu_regs.tcl to update this file.
//
// The following structures define most common architectural registers
// for each Arch family. 

namespace AstrisAPI {

enum class cpu_arch_family_e: unsigned short {
    ARMv7 = 1,      // Includes families ARMv4 through ARMv7
    ARMv8,
    ARC,
    XTENSA,
};

struct RegisterId
{
    int id;
    cpu_arch_family_e family;
    bool relative;                  // when true, the id is offset from CPU address
};

struct CPURegistersARMv7
{
    static constexpr RegisterId r0 = {0, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r1 = {1, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r2 = {2, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r3 = {3, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r4 = {4, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r5 = {5, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r6 = {6, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r7 = {7, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r8 = {8, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r9 = {9, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r10 = {10, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r11 = {11, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r12 = {12, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId ip = {12, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r13 = {13, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId sp = {13, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r14 = {14, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId lr = {14, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId r15 = {15, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId pc = {15, cpu_arch_family_e::ARMv7};
    static constexpr RegisterId cpsr = {25, cpu_arch_family_e::ARMv7};
};

struct CPURegistersARMv8
{
    static constexpr RegisterId x0 = {0, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x1 = {1, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x2 = {2, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x3 = {3, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x4 = {4, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x5 = {5, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x6 = {6, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x7 = {7, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x8 = {8, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x9 = {9, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x10 = {10, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x11 = {11, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x12 = {12, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x13 = {13, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x14 = {14, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x15 = {15, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x16 = {16, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x17 = {17, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x18 = {18, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x19 = {19, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x20 = {20, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x21 = {21, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x22 = {22, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x23 = {23, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x24 = {24, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x25 = {25, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x26 = {26, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x27 = {27, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId x28 = {28, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId fp = {29, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId lr = {30, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId sp = {31, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId pc = {32, cpu_arch_family_e::ARMv8};
    static constexpr RegisterId cpsr = {33, cpu_arch_family_e::ARMv8};
};

struct CPURegistersARC
{
    static constexpr RegisterId R0 = {0, cpu_arch_family_e::ARC};
    static constexpr RegisterId R1 = {1, cpu_arch_family_e::ARC};
    static constexpr RegisterId R2 = {2, cpu_arch_family_e::ARC};
    static constexpr RegisterId R3 = {3, cpu_arch_family_e::ARC};
    static constexpr RegisterId R4 = {4, cpu_arch_family_e::ARC};
    static constexpr RegisterId R5 = {5, cpu_arch_family_e::ARC};
    static constexpr RegisterId R6 = {6, cpu_arch_family_e::ARC};
    static constexpr RegisterId R7 = {7, cpu_arch_family_e::ARC};
    static constexpr RegisterId R8 = {8, cpu_arch_family_e::ARC};
    static constexpr RegisterId R9 = {9, cpu_arch_family_e::ARC};
    static constexpr RegisterId R10 = {10, cpu_arch_family_e::ARC};
    static constexpr RegisterId R11 = {11, cpu_arch_family_e::ARC};
    static constexpr RegisterId R12 = {12, cpu_arch_family_e::ARC};
    static constexpr RegisterId R13 = {13, cpu_arch_family_e::ARC};
    static constexpr RegisterId R14 = {14, cpu_arch_family_e::ARC};
    static constexpr RegisterId R15 = {15, cpu_arch_family_e::ARC};
    static constexpr RegisterId R16 = {16, cpu_arch_family_e::ARC};
    static constexpr RegisterId R17 = {17, cpu_arch_family_e::ARC};
    static constexpr RegisterId R18 = {18, cpu_arch_family_e::ARC};
    static constexpr RegisterId R19 = {19, cpu_arch_family_e::ARC};
    static constexpr RegisterId R20 = {20, cpu_arch_family_e::ARC};
    static constexpr RegisterId R21 = {21, cpu_arch_family_e::ARC};
    static constexpr RegisterId R22 = {22, cpu_arch_family_e::ARC};
    static constexpr RegisterId R23 = {23, cpu_arch_family_e::ARC};
    static constexpr RegisterId R24 = {24, cpu_arch_family_e::ARC};
    static constexpr RegisterId R25 = {25, cpu_arch_family_e::ARC};
    static constexpr RegisterId GP = {26, cpu_arch_family_e::ARC};
    static constexpr RegisterId FP = {27, cpu_arch_family_e::ARC};
    static constexpr RegisterId SP = {28, cpu_arch_family_e::ARC};
    static constexpr RegisterId ILINK = {29, cpu_arch_family_e::ARC};
    static constexpr RegisterId R30 = {30, cpu_arch_family_e::ARC};
    static constexpr RegisterId BLINK = {31, cpu_arch_family_e::ARC};
    static constexpr RegisterId PC = {70, cpu_arch_family_e::ARC};
    static constexpr RegisterId STATUS32 = {74, cpu_arch_family_e::ARC};
};

struct CPURegistersXtensa
{
    static constexpr RegisterId R0 = {0, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R1 = {1, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R2 = {2, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R3 = {3, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R4 = {4, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R5 = {5, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R6 = {6, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R7 = {7, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R8 = {8, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R9 = {9, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R10 = {10, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R11 = {11, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R12 = {12, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R13 = {13, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R14 = {14, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId R15 = {15, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId PC = {32, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF0 = {64, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF1 = {65, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF2 = {66, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF3 = {67, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF4 = {68, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF5 = {69, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF6 = {70, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF7 = {71, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF8 = {72, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF9 = {73, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF10 = {74, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF11 = {75, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF12 = {76, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF13 = {77, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF14 = {78, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF15 = {79, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF16 = {80, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF17 = {81, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF18 = {82, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF19 = {83, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF20 = {84, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF21 = {85, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF22 = {86, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF23 = {87, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF24 = {88, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF25 = {89, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF26 = {90, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF27 = {91, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF28 = {92, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF29 = {93, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF30 = {94, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF31 = {95, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF32 = {96, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF33 = {97, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF34 = {98, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF35 = {99, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF36 = {100, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF37 = {101, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF38 = {102, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF39 = {103, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF40 = {104, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF41 = {105, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF42 = {106, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF43 = {107, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF44 = {108, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF45 = {109, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF46 = {110, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF47 = {111, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF48 = {112, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF49 = {113, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF50 = {114, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF51 = {115, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF52 = {116, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF53 = {117, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF54 = {118, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF55 = {119, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF56 = {120, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF57 = {121, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF58 = {122, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF59 = {123, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF60 = {124, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF61 = {125, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF62 = {126, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId RF63 = {127, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId LBEG = {256, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId LEND = {257, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId LCOUNT = {258, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId SAR = {259, cpu_arch_family_e::XTENSA};
    static constexpr RegisterId BR = {260, cpu_arch_family_e::XTENSA};
};

} // namespace AstrisAPI

#endif // ifndef _NewAPI_CPURegisters_hpp_
